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Claude Code designs, builds and scope-tests an FPGA low-pass filter from one prompt

In an Octopart video, one prompt sends Claude Code through a digital low-pass filter on a Digilent Cmod S7 FPGA board. It writes and simulates the filter, then programs the board over JTAG. Through MCP servers for an Analog Discovery 2 and a Rigol scope, it sweeps test tones at 1, 5 and 15 kHz against the 10 kHz cutoff.

Open original source youtube.com · Octopart

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Why this evidence label?

The 18-minute video records the autonomous run, programming of the Cmod S7 and scope captures at 1, 5 and 15 kHz taken through the instrument MCP servers.

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The source video, on YouTube.

Briefing

The filter has a 10 kHz cutoff, with the Spartan-7's XADC as input and a Pmod DA4 DAC as output. Running Opus 4.8, Claude Code generated FIR coefficients in Python, wrote Verilog and SystemVerilog, authored the Vivado Tcl, generated the XADC IP, ran simulation, built the bitstream and programmed the board while the creator was at the zoo.

Through custom MCP servers for the Analog Discovery 2 and a Rigol MSO, the agent produced its own test tones, captured the output and judged the filter from the waveforms. The episode follows an earlier Octopart video in which the same setup brought up an older project on an Arty A7.

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