5 mo ago
Vibe-coding an I2S FIFO reclocker on an Intel MAX 10 FPGA
Dimdim had Gemini 3.1 Pro write the Verilog for an audio reclocker on a MAX 10 10M08 board. He pasted code from the chat into Quartus. The design passes I2S through a dual-clock FIFO, adds DSD and S/PDIF input and buffers in PSRAM. Gemini, Claude Sonnet 4.6 and Claude Opus 4.7 all failed to make a PRBS-15 test work.