GuideBB-0113

Using Claude Code to port and verify FPGA designs on real boards

The FPGA Developer blog describes giving Claude Code control of programming, UART and power cycling on an AMD FPGA bench. In the post's example, the agent ports a reference design to a new dev board, then tests and fixes it there. The author says such ports take a few hours. The post also covers token use and hooks.

Open original source fpgadeveloper.com · FPGA Developer

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Briefing

The author keeps a private repository, opsero-agent, with information on Opsero's FMC cards and reference designs, test and debug scripts and details for a board-repository MCP server. Boards are power-cycled through Wi-Fi Shelly plugs. For designs that boot PetaLinux from an SD card, Claude Code logs in over SSH and rewrites the card from the running board. For video output the post suggests a webcam on the monitor, or a PiKVM or JetKVM on the HDMI line.

The author pays $200 a month for the Max 20x plan and says reference-design work uses few tokens; research across hundreds of dev boards runs as parallel subagents to keep each context small. The post advises wrapping up a session above about 60% context use, and a hook that warns when an agent edits a generated file.

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